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ADC DAC board for FPGA (zed Board)

Updated: Oct 29, 2023

I always wanted to build a ADC and DAC board for my hobby experiments mainly in the digital radio domain. so here it is in a form of small series of videos. I designed and build these boards here at Adaptive Design ltd. and from time to time I'm enjoying my time working on them.

I added the schematics in pdf format for reference below

ADC_DAC_14bit
.pdf
Download PDF • 245KB

Here you can find the XCD constraint file for the ZedBoard FPGA design



# ----------------------------------------------------------------------------

# User LEDs - Bank 33

# ----------------------------------------------------------------------------

set_property PACKAGE_PIN T22 [get_ports {LD0}]; # "LD0"

set_property PACKAGE_PIN T21 [get_ports {LD1}]; # "LD1"

set_property PACKAGE_PIN U22 [get_ports {LD2}]; # "LD2"

set_property PACKAGE_PIN U21 [get_ports {LD3}]; # "LD3"

set_property PACKAGE_PIN V22 [get_ports {LD4}]; # "LD4"

set_property PACKAGE_PIN W22 [get_ports {LD5}]; # "LD5"

set_property PACKAGE_PIN U19 [get_ports {LD6}]; # "LD6"

set_property PACKAGE_PIN U14 [get_ports {LD7}]; # "LD7"

# ----------------------------------------------------------------------------

# User DIP Switches - Bank 35

# ----------------------------------------------------------------------------

set_property PACKAGE_PIN F22 [get_ports {reset}]; # "SW0"

set_property PACKAGE_PIN G22 [get_ports {SW1}]; # "SW1"

set_property PACKAGE_PIN H22 [get_ports {SW2}]; # "SW2"

set_property PACKAGE_PIN F21 [get_ports {SW3}]; # "SW3"

set_property PACKAGE_PIN H19 [get_ports {SW4}]; # "SW4"

set_property PACKAGE_PIN H18 [get_ports {SW5}]; # "SW5"

set_property PACKAGE_PIN H17 [get_ports {SW6}]; # "SW6"

set_property PACKAGE_PIN M15 [get_ports {SW7}]; # "SW7"


# ----------------------------------------------------------------------------

# FMC Expansion Connector - Bank 13

# ----------------------------------------------------------------------------

set_property PACKAGE_PIN R7 [get_ports {FMC_SCL}]; # "FMC-SCL"

set_property PACKAGE_PIN U7 [get_ports {FMC_SDA}]; # "FMC-SDA"


# ----------------------------------------------------------------------------

# FMC Expansion Connector - Bank 33

# ----------------------------------------------------------------------------

set_property PACKAGE_PIN AB14 [get_ports {FMC_PRSNT}]; # "FMC-PRSNT"


# ----------------------------------------------------------------------------

# FMC Expansion Connector - Bank 34

# ----------------------------------------------------------------------------

set_property PACKAGE_PIN L19 [get_ports {FMC_CLK0_N}]; # "FMC-CLK0_N"

set_property PACKAGE_PIN L18 [get_ports {FMC_CLK0_P}]; # "FMC-CLK0_P"

set_property PACKAGE_PIN M20 [get_ports {FMC_LA00_CC_N}]; # "FMC-LA00_CC_N"

set_property PACKAGE_PIN M19 [get_ports {FMC_LA00_CC_P}]; # "FMC-LA00_CC_P"

set_property PACKAGE_PIN N20 [get_ports {FMC_LA01_N}]; # "FMC-LA01_CC_N"

set_property PACKAGE_PIN N19 [get_ports {FMC_LA01_P}]; # "FMC-LA01_CC_P" - corrected 6/6/16 GE

set_property PACKAGE_PIN P18 [get_ports {FMC_LA02_N}]; # "FMC-LA02_N"

set_property PACKAGE_PIN P17 [get_ports {FMC_LA02_P}]; # "FMC-LA02_P"

set_property PACKAGE_PIN P22 [get_ports {FMC_LA03_N}]; # "FMC-LA03_N"

set_property PACKAGE_PIN N22 [get_ports {FMC_LA03_P}]; # "FMC-LA03_P"

set_property PACKAGE_PIN M22 [get_ports {FMC_LA04_N}]; # "FMC-LA04_N"

set_property PACKAGE_PIN M21 [get_ports {FMC_LA04_P}]; # "FMC-LA04_P"

set_property PACKAGE_PIN K18 [get_ports {FMC_LA05_N}]; # "FMC-LA05_N"

set_property PACKAGE_PIN J18 [get_ports {FMC_LA05_P}]; # "FMC-LA05_P"

set_property PACKAGE_PIN L22 [get_ports {FMC_LA06_N}]; # "FMC-LA06_N"

set_property PACKAGE_PIN L21 [get_ports {FMC_LA06_P}]; # "FMC-LA06_P"

set_property PACKAGE_PIN T17 [get_ports {FMC_LA07_N}]; # "FMC-LA07_N"

set_property PACKAGE_PIN T16 [get_ports {FMC_LA07_P}]; # "FMC-LA07_P"

set_property PACKAGE_PIN J22 [get_ports {FMC_LA08_N}]; # "FMC-LA08_N"

set_property PACKAGE_PIN J21 [get_ports {FMC_LA08_P}]; # "FMC-LA08_P"

set_property PACKAGE_PIN R21 [get_ports {CS_CLK}]; # "FMC-LA09_N"

set_property PACKAGE_PIN R20 [get_ports {SDI}]; # "FMC-LA09_P"

set_property PACKAGE_PIN T19 [get_ports {FMC_LA10_N}]; # "FMC-LA10_N"

set_property PACKAGE_PIN R19 [get_ports {FMC_LA10_P}]; # "FMC-LA10_P"

set_property PACKAGE_PIN N18 [get_ports {CS_DAC}]; # "FMC-LA11_N" this is CD DAC

set_property PACKAGE_PIN N17 [get_ports {CS_ADC}]; # "FMC-LA11_P" this CS ADC

set_property PACKAGE_PIN P21 [get_ports {FMC_LA12_N}]; # "FMC-LA12_N"

set_property PACKAGE_PIN P20 [get_ports {FMC_LA12_P}]; # "FMC-LA12_P"

set_property PACKAGE_PIN M17 [get_ports {SCK}]; # "FMC-LA13_N"

set_property PACKAGE_PIN L17 [get_ports {FMC_LA13_P}]; # "FMC-LA13_P"

set_property PACKAGE_PIN K20 [get_ports {FMC_LA14_N}]; # "FMC-LA14_N"

set_property PACKAGE_PIN K19 [get_ports {FMC_LA14_P}]; # "FMC-LA14_P"

set_property PACKAGE_PIN J17 [get_ports {FMC_LA15_N}]; # "FMC-LA15_N"

set_property PACKAGE_PIN J16 [get_ports {FMC_LA15_P}]; # "FMC-LA15_P"

set_property PACKAGE_PIN K21 [get_ports {FMC_LA16_N}]; # "FMC-LA16_N"

set_property PACKAGE_PIN J20 [get_ports {FMC_LA16_P}]; # "FMC-LA16_P"


# ----------------------------------------------------------------------------

# FMC Expansion Connector - Bank 35

# ----------------------------------------------------------------------------

set_property PACKAGE_PIN C19 [get_ports {FMC_CLK1_N}]; # "FMC-CLK1_N"

set_property PACKAGE_PIN D18 [get_ports {FMC_CLK1_P}]; # "FMC-CLK1_P"

set_property PACKAGE_PIN B20 [get_ports {FMC_LA17_CC_N}]; # "FMC-LA17_CC_N"

set_property PACKAGE_PIN B19 [get_ports {FMC_LA17_CC_P}]; # "FMC-LA17_CC_P"

set_property PACKAGE_PIN C20 [get_ports {FMC_LA18_CC_N}]; # "FMC-LA18_CC_N"

set_property PACKAGE_PIN D20 [get_ports {FMC_LA18_CC_P}]; # "FMC-LA18_CC_P"

set_property PACKAGE_PIN G16 [get_ports {FMC_LA19_N}]; # "FMC-LA19_N"

set_property PACKAGE_PIN G15 [get_ports {FMC_LA19_P}]; # "FMC-LA19_P"

set_property PACKAGE_PIN G21 [get_ports {FMC_LA20_N}]; # "FMC-LA20_N"

set_property PACKAGE_PIN G20 [get_ports {FMC_LA20_P}]; # "FMC-LA20_P"

set_property PACKAGE_PIN E20 [get_ports {FMC_LA21_N}]; # "FMC-LA21_N"

set_property PACKAGE_PIN E19 [get_ports {FMC_LA21_P}]; # "FMC-LA21_P"

set_property PACKAGE_PIN F19 [get_ports {FMC_LA22_N}]; # "FMC-LA22_N"

set_property PACKAGE_PIN G19 [get_ports {FMC_LA22_P}]; # "FMC-LA22_P"

set_property PACKAGE_PIN D15 [get_ports {FMC_LA23_N}]; # "FMC-LA23_N"

set_property PACKAGE_PIN E15 [get_ports {FMC_LA23_P}]; # "FMC-LA23_P"

set_property PACKAGE_PIN A19 [get_ports {FMC_LA24_N}]; # "FMC-LA24_N"

set_property PACKAGE_PIN A18 [get_ports {FMC_LA24_P}]; # "FMC-LA24_P"

set_property PACKAGE_PIN C22 [get_ports {FMC_LA25_N}]; # "FMC-LA25_N"

set_property PACKAGE_PIN D22 [get_ports {FMC_LA25_P}]; # "FMC-LA25_P"

set_property PACKAGE_PIN E18 [get_ports {FMC_LA26_N}]; # "FMC-LA26_N"

set_property PACKAGE_PIN F18 [get_ports {FMC_LA26_P}]; # "FMC-LA26_P"

set_property PACKAGE_PIN D21 [get_ports {FMC_LA27_N}]; # "FMC-LA27_N"

set_property PACKAGE_PIN E21 [get_ports {FMC_LA27_P}]; # "FMC-LA27_P"

set_property PACKAGE_PIN A17 [get_ports {FMC_LA28_N}]; # "FMC-LA28_N"

set_property PACKAGE_PIN A16 [get_ports {FMC_LA28_P}]; # "FMC-LA28_P"

set_property PACKAGE_PIN C18 [get_ports {FMC_LA29_N}]; # "FMC-LA29_N"

set_property PACKAGE_PIN C17 [get_ports {FMC_LA29_P}]; # "FMC-LA29_P"

set_property PACKAGE_PIN B15 [get_ports {FMC_LA30_N}]; # "FMC-LA30_N"

set_property PACKAGE_PIN C15 [get_ports {FMC_LA30_P}]; # "FMC-LA30_P"

set_property PACKAGE_PIN B17 [get_ports {FMC_LA31_N}]; # "FMC-LA31_N"

set_property PACKAGE_PIN B16 [get_ports {FMC_LA31_P}]; # "FMC-LA31_P"

set_property PACKAGE_PIN A22 [get_ports {FMC_LA32_N}]; # "FMC-LA32_N"

set_property PACKAGE_PIN A21 [get_ports {FMC_LA32_P}]; # "FMC-LA32_P"

set_property PACKAGE_PIN B22 [get_ports {FMC_LA33_N}]; # "FMC-LA33_N"

set_property PACKAGE_PIN B21 [get_ports {FMC_LA33_P}]; # "FMC-LA33_P"






# ----------------------------------------------------------------------------

# IOSTANDARD Constraints

#

# Note that these IOSTANDARD constraints are applied to all IOs currently

# assigned within an I/O bank. If these IOSTANDARD constraints are

# evaluated prior to other PACKAGE_PIN constraints being applied, then

# the IOSTANDARD specified will likely not be applied properly to those

# pins. Therefore, bank wide IOSTANDARD constraints should be placed

# within the XDC file in a location that is evaluated AFTER all

# PACKAGE_PIN constraints within the target bank have been evaluated.

#

# Un-comment one or more of the following IOSTANDARD constraints according to

# the bank pin assignments that are required within a design.

# ----------------------------------------------------------------------------


# Note that the bank voltage for IO Bank 33 is fixed to 3.3V on ZedBoard.

set_property IOSTANDARD LVCMOS33 [get_ports -of_objects [get_iobanks 33]];




# Set the bank voltage for IO Bank 34 to 1.8V by default.

# set_property IOSTANDARD LVCMOS33 [get_ports -of_objects [get_iobanks 34]];

set_property IOSTANDARD LVCMOS25 [get_ports {CS*}];

set_property IOSTANDARD LVCMOS25 [get_ports {SDI}];

set_property IOSTANDARD LVCMOS25 [get_ports {SCK}];

set_property IOSTANDARD LVCMOS25 [get_ports {SDO}];

set_property IOSTANDARD LVCMOS25 [get_ports {reset}];

set_property IOSTANDARD LVDS_25 [get_ports {FMC*}];


# Set the bank voltage for IO Bank 35 to 1.8V by default.

# set_property IOSTANDARD LVCMOS33 [get_ports -of_objects [get_iobanks 35]];

# set_property IOSTANDARD LVCMOS25 [get_ports -of_objects [get_iobanks 35]];


#set_property IOSTANDARD LVDS_25 [get_ports -of_objects [get_iobanks 35]];


# Note that the bank voltage for IO Bank 13 is fixed to 3.3V on ZedBoard.

set_property IOSTANDARD LVCMOS33 [get_ports -of_objects [get_iobanks 13]];




Happy Watching!





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